发明名称 |
SYNCHRONOUS EXECUTION OF DESIGNATED COMPUTING EVENTS USING HARDWARE-ASSISTED VIRTUALIZATION |
摘要 |
Providing synchronous processing of the designated computing events using hardware-assisted virtualization technology by performing at least the following: detecting a designated computing event using a high priority, low capability routine, creating a copy code in an alternate memory space of a first code located in a first memory space, modifying the copy code to call for analysis of at least a portion of the copy code that corresponds to the first code, switching execution of the first code with the modified copy code using an address translation data structure that translates a guest memory address to a host memory address after a return of the high priority, low capability routine; and analyzing synchronously the at least a portion of the code within the copy code that corresponds to the first code based on the replacement of the first code with the modified copy code. |
申请公布号 |
US2017116419(A1) |
申请公布日期 |
2017.04.27 |
申请号 |
US201514924493 |
申请日期 |
2015.10.27 |
申请人 |
Woodward Carl D.;Mankin Jennifer;Rubakha Dmitri;Shanmugavelayutham Palanivel Rajan;Sukhomlinov Vadim |
发明人 |
Woodward Carl D.;Mankin Jennifer;Rubakha Dmitri;Shanmugavelayutham Palanivel Rajan;Sukhomlinov Vadim |
分类号 |
G06F21/56;G06F9/54 |
主分类号 |
G06F21/56 |
代理机构 |
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代理人 |
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主权项 |
1. A machine readable medium on which instructions are stored, comprising instructions that when executed cause a machine for providing synchronous processing of designated computing events to:
detect a designated computing event using a high priority, low capability routine; create a copy code in an alternate memory space of a first code located in a first memory space; modify the copy code to call for analysis of at least a portion of the copy code that corresponds to the first code; switch execution of the first code with the modified copy code using an address translation data structure that translates a guest memory address to a host memory address after a return of the high priority, low capability routine; and analyze synchronously the at least a portion of the code within the copy code that corresponds to the first code. |
地址 |
Santa Clara CA US |