Semiconductor packages including electrical insulation features

摘要

A semiconductor package can include a substrate and a semiconductor chip inside the semiconductor package mounted on the substrate. A first conductive pattern can be on the substrate inside the semiconductor package and can be electrically connected to an input/output of the semiconductor chip. A holder can be on the substrate, where the holder can be configured to provide a recess in which the semiconductor chip is located. An electrically insulating adhesive layer can be configured to electrically insulate the first conductive pattern from an Electric Static Discharge (ESD) source located outside the semiconductor package and configured to adhere the holder to the substrate.

主权项

1. A semiconductor package comprising:
a package substrate including a first conductive pattern; a semiconductor chip mounted on the package substrate and electrically connected to the first conductive pattern; a holder attached to the package substrate with an adhesive layer interposed therebetween and spaced apart from the semiconductor chip; a transparent substrate attached on the holder and overlapping the semiconductor chip, wherein the adhesive layer contacts a side of the first conductive pattern; and a second conductive pattern on the package substrate being spaced apart from and electrically insulated from the first conductive pattern, wherein the adhesive layer contacts a side of the second conductive pattern that is directly adjacent to the side of the first conductive pattern.