发明名称 Data processing device, data processing method, and computer program
摘要 A device for temporarily storing data output from a register or data obtained by processing the output data, a processing method therefor, a program, and the like is provided. A circuit (hereinafter, referred to as a selective memory cell) in which a plurality of switches and a signal storing circuit are connected is provided in a data processing device. The selective memory cell can selectively store necessary data. A result of a frequently performed process is stored in the selective memory cell. A process whose result is stored can be performed by only outputting the stored data instead of performing the whole process; thus, input data does not need to be transferred, which can result in a reduction in processing time.
申请公布号 US9612795(B2) 申请公布日期 2017.04.04
申请号 US201414200433 申请日期 2014.03.07
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Ohshima Kazuaki
分类号 G11C19/00;H03K3/037;G11C11/24;G06F5/01;H03K3/356;H03K17/00;H03K17/04 主分类号 G11C19/00
代理机构 Fish & Richardson P.C. 代理人 Fish & Richardson P.C.
主权项 1. A data processing device comprising: a memory; a register; a logic circuit configured to perform an arithmetic processing on a data; and a selective memory comprising: an input terminal and an output terminal;a first switch comprising a first terminal electrically connected to the input terminal, and a second terminal electrically connected to the output terminal;a second switch comprising a third terminal electrically connected to the second terminal, and a fourth terminal; anda signal storing circuit electrically connected to the fourth terminal, wherein: the data is transferred from the memory to the register, processed by the arithmetic processing in the logic circuit, and then input to the selective memory, the selective memory is configured to select at least a first operation, a second operation, and a third operation, the first operation comprises the steps of outputting the data input from the input terminal to the output terminal, and storing the data in the signal storing circuit,the second operation comprises the step of outputting the data input from the input terminal to the output terminal without storing the data in the signal storing circuit, andthe third operation comprises the step of outputting the data stored in the signal storing circuit to the output terminal, and the data processing device is configured to perform at least a first processing, a second processing, and a third processing, when a plurality of processes are performed in the data processing device, the first processing comprises the step of selecting a most frequently performed process from the plurality of processes,the second processing comprises the step of storing a result of the most frequently performed process in the signal storing circuit when the most frequently performed process is performed for the first time, andthe third processing comprises the step of outputting the result stored in the signal storing circuit when the most frequently performed process is performed for the second time.
地址 Atsugi-shi, Kanagawa-ken JP