发明名称 Three-dimensionally integrated circuit devices including oxidation suppression layers
摘要 A vertically integrated circuit device can include a substrate having a first region reserved for first functional circuits of the vertically integrated circuit device, where the first functional circuits has a substantially constant top surface level across the first region and having a second region reserved for second functional circuits of the vertically integrated circuit device and spaced apart from the first region. The second functional circuits can have a varied top surface level across the second region. A doped oxidation suppressing material can be included in the substrate and can extend from the first region to the second region at an interface of the substrate with the first functional circuits and the second functional circuits, respectively.
申请公布号 US9601577(B1) 申请公布日期 2017.03.21
申请号 US201615251510 申请日期 2016.08.30
申请人 Samsung Electronics Co., Ltd. 发明人 Lee Dong-Sik;Kim Youngwoo;Shin Jinhyun;Lee Jung Hoon
分类号 H01L29/10;H01L27/115;H01L23/522;H01L23/528;H01L29/423;G11C16/08 主分类号 H01L29/10
代理机构 Ward and Smith, P.A. 代理人 Ward and Smith, P.A.
主权项 1. A three-dimensional semiconductor memory device, comprising: an oxidation suppressing layer in a substrate; a plurality of stacks on the oxidation suppressing layer, each of the stacks includes a horizontal gate insulating layer on the oxidation suppressing layer, and insulating layers and electrodes alternately and vertically stacked on the horizontal gate insulating layer; and a plurality of vertical structures passing through the stacks and connected to the substrate.
地址 KR