发明名称 半導体装置
摘要 A control circuit (105) controls execution of first-stage processing for increasing a threshold voltage of both or one of a first storage element (102) and a second storage element (103) until the threshold voltage of the first storage element (102) and the second storage element (103) attains to a prescribed write verify level when a request for erase of twin cell data is received. The control circuit 105 controls execution of second-stage processing for lowering a threshold voltage of the first storage element (102) and the second storage element (103) until the threshold voltage of the first storage element (102) and the second storage element (103) attains to a prescribed erase verify level after the first-stage processing is performed.
申请公布号 JP6097398(B2) 申请公布日期 2017.03.15
申请号 JP20150531708 申请日期 2013.08.15
申请人 ルネサスエレクトロニクス株式会社 发明人 西山 崇之
分类号 G11C16/02;G11C16/04 主分类号 G11C16/02
代理机构 代理人
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