发明名称 A HIGH SPEED AMPLIFIER CHAIN AND METHOD FOR SETTLING AMPLIFIER CHAIN USING MULTI-PHASE CLOCK SIGNAL
摘要 A method of settling an amplifier and a multistage amplifier are provided. To settle an amplifier, a plurality of clock signals are, respectively, applied to preset switches, each of which is placed between amplifiers connected in cascade, to open the preset switches sequentially, thereby settling the amplifiers in order.
申请公布号 KR101445721(B1) 申请公布日期 2014.09.26
申请号 KR20080010715 申请日期 2008.02.01
申请人 发明人
分类号 H03F1/02 主分类号 H03F1/02
代理机构 代理人
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