Crosstalk polarity reversal and cancellation through substrate material

摘要

Transmission lines with a first dielectric material separating signal traces and a second dielectric material separating the signal traces from a ground plane. In embodiments, mutual capacitance is tuned relative to self-capacitance to reverse polarity of far end crosstalk between a victim and aggressor channel relative to that induced by other interconnect portions along the length of the channels, such as inductively coupled portions. In embodiments, a transmission line for a single-ended channel includes a material of a higher dielectric constant within the same routing plane as a microstrip or stripline conductor, and a material of a lower dielectric constant between the conductor and the ground plane(s). In embodiments, a transmission line for a differential pair includes a material of a lower dielectric constant within the same routing plane as a microstrip or stripline conductors, and a material of a higher dielectric constant between the conductors and the ground plane(s).

主权项

1. A system comprising:
a first integrated circuit (IC) chip having a first and second input/output (I/O) channels; a substrate affixed to the IC chip through first interconnect bumps, the substrate including transmission line circuitry further comprising:
a first conductive trace defining a routing path for the first I/O channel on a first metallization level disposed over a package substrate;a second conductive trace defining a routing path for the second I/O channel on the first metallization level;a first dielectric material disposed between the first and second conductive traces;a ground plane on a second metallization level disposed over the substrate and above or below the first metallization level; anda second dielectric material disposed between the ground plane and the first and second conductive traces, wherein the second dielectric material has a different dielectric constant than that of the first dielectric material; and second bumps coupling the first and second I/O channels to a second IC chip.