发明名称 Debugger display of vector register contents after compiler optimizations for vector instructions
摘要 An optimizing compiler includes a vector optimization mechanism that optimizes vector instructions by eliminating one or more vector element reverse operations. The compiler can generate code that includes multiple vector element reverse operations that are inserted by the compiler to account for a mismatch between the endian bias of the instruction and the endian preference indicated by the programmer or programming environment. The compiler then analyzes the code and reduces the number of vector element reverse operations to improve the run-time performance of the code. The compiler generates a debugger table that specifies which instructions have corresponding reformatting operations. A debugger then uses the debugger table to display contents of the vector register, which is displayed in regular form as well as in a form that is reformatted according to information in the debugger table.
申请公布号 US9563534(B1) 申请公布日期 2017.02.07
申请号 US201514850652 申请日期 2015.09.10
申请人 International Business Machines Corporation 发明人 Gschwind Michael Karl;Schmidt William J.
分类号 G06F11/36 主分类号 G06F11/36
代理机构 Martin & Associates, LLC 代理人 Martin & Associates, LLC ;Martin Derek P.
主权项 1. An apparatus comprising: at least one processor; a memory coupled to the at least one processor; a computer program residing in the memory, the computer program including a plurality of instructions that includes at least one vector instruction; a debug table that specifies a vector register, a corresponding address range for the specified vector register, and a corresponding endian reformatting type for the specified vector register; and a debugger residing in the memory and executed by the at least one processor, the debugger receiving a request to display contents of a vector register at a current instruction in the computer program, and in response, the debugger determines whether the current instruction has an address within an address range in the debug table, and when the current instruction is not within an address range in the debug table, the debugger displays the contents of the vector register, and when the current instruction has an address within an address range of the debug table, the debugger determines from the debug table an endian reformatting type corresponding to the address range, and displays the contents of the vector register and additionally displays the contents of the vector register after reformatting the contents according to the endian reformatting type.
地址 Armonk NY US