MEMORY DEVICE HAVING PROGRAMMABLE IMPEDANCE ELEMENTS WITH A COMMON CONDUCTOR FORMED BELOW BIT LINES
摘要
An integrated circuit device can include a plurality of access transistors formed in a substrate having control terminals connected to word lines that extend in a first direction; a plurality of two-terminal programmable impedance elements formed over the substrate; at least one conductive plate structure formed on and having a common conductive connection to, the programmable impedance elements, and extending in at least the first direction; a plurality of storage contacts that extend from a first current terminal of each access transistor to one of the programmable impedance elements; a plurality of bit lines formed over the at least one conductive plate structure, the bit lines extending in a second direction different from the first direction; and a plurality of bit line contacts that extend from a second current terminal of each access transistor through openings in the at least one plate structure to one of the bit lines.
申请公布号
WO2017015333(A1)
申请公布日期
2017.01.26
申请号
WO2016US43080
申请日期
2016.07.20
申请人
ADESTO TECHNOLOGIES CORPORATION
发明人
RAMSBEY, Mark T.;GOPINATH, Venkatesh P.;SHIELDS, Jeffrey Allan;TSAI, Kuei Chang;GOPALAN, Chakravarthy;VAN BUSKIRK, Michael A.