Method for Integrated Circuit Manufacturing

摘要

A method of manufacturing an integrated circuit (IC) includes: receiving a target layout of the IC, decomposing the target layout into a plurality of sub-layouts for a multiple patterning process, identifying re-locatable pattern edges in the sub-layouts, and relocating the edges to improve manufacturability of the IC. In an embodiment, relocating the edges includes: choosing an evaluation index based on a target manufacturing process, moving one or more of the edges, calculating a score of manufacturability based on the evaluation index, and repeating the moving and the calculating until the score meets a threshold.

主权项

1. A method comprising:
receiving a target layout of an integrated circuit (IC); decomposing the target layout into a plurality of sub-layouts for a multiple patterning process, wherein the sub-layouts include a plurality of pattern edges, each of which is re-locatable within a respective region of freedom; relocating the pattern edges to improve manufacturability of the IC, resulting in modified sub-layouts; and storing the modified sub-layouts in a tangible computer-readable medium for use by a further IC process stage.