发明名称 |
Data processor and method for data processing |
摘要 |
A integrated circuit device has at least one instruction processing module arranged for executing vector data processing upon receipt of a respective one of a set of data processing instructions. The data processing instructions include at least one matrix processing instruction for processing elements of a matrix. The elements of rows of the matrix are stored in a set of register, and the instruction processing module comprising an accessing unit for accessing selected elements of the matrix, which selected elements are non-sequentially located according to a predetermined pattern across multiple registers of the set of registers, the accessing enabling respective processing lanes to write or read different registers. Advantageously elements in columns of a matrix can efficiently be processed. |
申请公布号 |
EP2943875(A4) |
申请公布日期 |
2016.11.30 |
申请号 |
EP20130870831 |
申请日期 |
2013.01.10 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
BARAK, ITZHAK;AMIR, AVIRAM;BEN ZEEV, ELIEZER |
分类号 |
G06F9/06;G06F7/76;G06F9/30;G06F12/00;G06F15/80 |
主分类号 |
G06F9/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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