发明名称 パリティビット出力回路およびパリティチェック回路
摘要 A semiconductor device includes a first transistor, a second transistor, a first transistor group, and a second transistor group. The first transistor group includes a third transistor, a fourth transistor, and four terminals. The second transistor group includes fifth to eighth transistors and four terminals. The first transistor, the third transistor, the sixth transistor, and the eighth transistor are n-channel transistors, and the second transistor, the fourth transistor, the fifth transistor, and the seventh transistor are p-channel transistors.
申请公布号 JP5936908(B2) 申请公布日期 2016.06.22
申请号 JP20120108216 申请日期 2012.05.10
申请人 株式会社半導体エネルギー研究所 发明人 大貫 達也
分类号 H03K3/356;C23C14/08;H01L21/8234;H01L27/088;H01L29/786;H03K19/096 主分类号 H03K3/356
代理机构 代理人
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