发明名称 LINK LAYER SIGNAL SYNCHRONIZATION
摘要 Embodiments of the present disclosure are directed toward signal synchronization in a link layer interconnect fabric. In one instance, an apparatus with logic for signal synchronization may include a clock synchronization logic to compare a core clock of the apparatus having a core clock frequency against a transmission clock of the apparatus having a first frequency or a reception clock of the apparatus having a second frequency, and, based on results of the comparison, generate a synchronized link transfer transmission clock or a synchronized link transfer reception clock respectively.. Other embodiments may be described and/or claimed.
申请公布号 EP3018849(A1) 申请公布日期 2016.05.11
申请号 EP20150190312 申请日期 2015.10.16
申请人 INTEL CORPORATION 发明人 BIRRITTELLA, MARK S.
分类号 H04J3/06;G06F1/12;G06F5/06;H04L7/00 主分类号 H04J3/06
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