发明名称 ELECTROLESS METAL THROUGH SILICON VIA
摘要 A method of making a substrate-through metal via having a high aspect ratio, in a semiconductor substrate, and a metal pattern on the substrate surface, includes providing a semiconductor substrate (wafer) and depositing poly-silicon on the substrate. The the poly-silicon on the substrate surface is patterned by etching away unwanted portions. Then, Ni is selectiveley deposited on the poly-silicon by an electroless process. A via hole is made through the substrate, wherein the walls in the hole is subjected to the same processing as above. Cu is deposited on the Ni by a plating process. Line widths and spacings<10 &mu;m are provided on both sides of the wafer.
申请公布号 EP2901475(A4) 申请公布日期 2016.05.04
申请号 EP20130841291 申请日期 2013.09.27
申请人 SILEX MICROSYSTEMS AB 发明人 EBEFORS, THORBJÖRN;KNUTSSON, HENRIK
分类号 H01L21/768;H01L23/48 主分类号 H01L21/768
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