发明名称 Gate-all-around semiconductor device and method of fabricating the same
摘要 The disclosed technology generally relates to semiconductor devices and more particularly to a gate-all-around semiconductor device, and methods of fabricating the same. In one aspect, the method comprises providing on a semiconductor substrate between STI regions at least one suspended nanostructure anchored by a source region and a drain region. The suspended nanostructure is formed of a crystalline semiconductor material that is different from a crystalline semiconductor material of the semiconductor substrate. A gate stack surrounds the at least one suspended nanostructure.
申请公布号 US9324818(B2) 申请公布日期 2016.04.26
申请号 US201514671134 申请日期 2015.03.27
申请人 IMEC VZW 发明人 Waldron Niamh;Merckling Clement;Collaert Nadine
分类号 H01L29/41;B82Y10/00;B82Y40/00;H01L29/66;H01L29/775;H01L29/06;H01L29/10;H01L29/20;H01L29/04;H01L29/423;H01L29/78 主分类号 H01L29/41
代理机构 Knobbe, Martens, Olson & Bear LLP 代理人 Knobbe, Martens, Olson & Bear LLP
主权项 1. A method of fabricating a semiconductor device, the method comprising: providing a semiconductor substrate formed of a first crystalline semiconductor material; forming a plurality of shallow trench isolation (STI) regions in the semiconductor substrate; forming a plurality of semiconductor fins interposed between a pair of adjacent STI regions and extending in a first lateral direction, each of the semiconductor fins comprising a second crystalline semiconductor material lattice mismatched to the first crystalline semiconductor material, each semiconductor fin being separated from an adjacent fin by one of the STI regions; providing at least one nanostructure formed of a third crystalline semiconductor material on the second crystalline semiconductor material of each semiconductor fin, the at least one nanostructure extending in the first lateral direction; providing a sacrificial gate on the at least one nanostructure; providing on the at least one nanostructure a source region and a drain region separated in the first lateral direction from the source region by the sacrificial gate; removing the sacrificial gate and further removing the second crystalline semiconductor material, thereby suspending the at least one nanostructure being anchored by the source and drain region; and providing a final gate stack surrounding the at least one nanostructure after removing the second crystalline semiconductor material.
地址 Leuven BE