发明名称 ARITHMETIC METHOD AND CIRCUIT THEREFOR
摘要 PURPOSE:To provide arithmetic method and' circuit capable of accelerating shifting operation and simplifying the circuit. CONSTITUTION:Data A, B inputted respectively through data buses 1, 2 are inputted to a barrel shifter, shifted in accordance with the quantity of shift, data corresponding to the quantity of shift are formed from the data A, B based upon the quantity of shift in parallel with the shifting operation, the formed data are inputted to an arithmetic/logic operation circuit and added to all '1' data, and all '0' in the shift result of the barrel shifter is judged in accordance with the exitence of an overflow in the added result. Since the all '0' of the shifted result can be judged by the adding operation of the arithmetic/logical operation circuit which is executed in parallel with the shifting operation of the barrel shifter, the necessity of a flag generating circuit for judging and forming all '0' included in barrel shifting can be eliminated and rapidly shifting operation can be executed.
申请公布号 JPH0667847(A) 申请公布日期 1994.03.11
申请号 JP19920221254 申请日期 1992.08.20
申请人 HITACHI LTD 发明人 NAKAHARA SHIGERU
分类号 G06F7/38 主分类号 G06F7/38
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