发明名称 |
A NETWORK RECEIVER FOR A NETWORK USING DISTRIBUTED CLOCK SYNCHRONIZATION AND A METHOD OF ADJUSTING A FREQUENCY OF AN INTERNAL CLOCK OF THE NETWORK RECEIVER |
摘要 |
A network receiver for a network using distributed clock synchronization and a method of adjusting a frequency of an internal clock of the network receiver are provided. The network receiver receives from the network an input signal and has an internal clock for generating a clock signal. The network receiver further includes a clock bit comparator and an adjustment signal generator. The clock bit comparator compares lengths of a first time period lapsed while receiving at least five consecutive bits of the signal and of an internal clock time interval representing the same number of bits as a number of bits of the first time period. The adjustment signal generator generates a frequency adjustment signal for controlling a frequency of the internal clock in dependence of a result of the comparison of the lengths to reduce a difference between the lengths. |
申请公布号 |
EP3005605(A1) |
申请公布日期 |
2016.04.13 |
申请号 |
EP20130735408 |
申请日期 |
2013.05.29 |
申请人 |
FREESCALE SEMICONDUCTOR, INC.;GACH, ROBERT |
发明人 |
GACH, ROBERT |
分类号 |
H04L7/00;H04L7/033 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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