发明名称 Enabling package-on-package (PoP) pad surface finishes on bumpless build-up layer (BBUL) package
摘要 A bumpless build-up layer (BBUL) integrated circuit package and method of manufacturing are presented. In some embodiments, the package-on-package (PoP) pads of the BBUL integrated circuit package has a surface finish that can be palladium, nickel-palladium, nickel-gold, nickel-palladium-gold, or palladium-nickel-palladium-gold. In some embodiments, the PoP pad surface finish can be formed using either an electroless or electrolytic process.
申请公布号 US9299602(B2) 申请公布日期 2016.03.29
申请号 US201113997146 申请日期 2011.12.20
申请人 Intel Corporation 发明人 Zhang Qinglei;Wu Tao;Hlad Mark S.;Gurumurthy Charavana K.
分类号 H01L21/768;H01L23/498;H01L25/10;H01L23/538;H01L21/48;H01L23/00;H05K3/34 主分类号 H01L21/768
代理机构 Blakely, Sokoloff, Taylor & Zafman LLP 代理人 Blakely, Sokoloff, Taylor & Zafman LLP
主权项 1. A method of manufacturing an integrated circuit (IC) package, the method comprising: providing a package core with a plurality of package-on-package (PoP) pad locations formed on the package core, wherein the plurality of PoP pad locations are plated with an etch layer of conductive material; plating a sub-surface finish being a group-10 element onto the etch layer at the PoP pad locations; forming at least one build-up layer including interconnects formed therein over a die disposed on the package core and the PoP pad locations; and exposing the PoP pad locations on a side opposing the build-up layer.
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