| 摘要 |
Disclosed is a shift register for use in a display driving circuit that simultaneously selects signal lines, including, in a stage thereof: a flip-flop (FF) including an initialization terminal (INITB); and a signal generating circuit that receives a simultaneous selection signal (AONB signal) and that generates an output signal (OUTB) of the stage by use of an output (Q, QB) of the flip-flop, wherein: the output signal (OUTB) of the stage becomes active due to an activation of the simultaneous selection signal so as to be active during a period of the simultaneous selection; the output (Q, QB) of the flip-flop (FF) is non-active while the initialization terminal (INITB), a set terminal (SB), and a reset terminal (R) of the flip-flop; and the initialization terminal (INITB) of the flip-flop receives the simultaneous selection signal (AONB signal). This shift register makes it possible to downsize various drivers. |
