Chip scale module package in BGA semiconductor package

摘要

A semiconductor package includes a ball grid array (BGA) substrate having integrated metal layer circuitry, a flip chip chip scale module package (CSMP) having a first integrated passive device (IPD), the flip chip chip scale module package attached to the BGA substrate, and an application die attached to the IPD. A method of manufacturing a semiconductor package includes providing a BGA substrate having integrated metal layer circuitry, attaching a flip chip CSMP having a first IPD to the BGA substrate, and attaching an application die to the IPD.

主权项

1. A semiconductor device, comprising:
a ball grid array (BGA) substrate including integrated metal layers; a plurality of first interconnects connected to the integrated metal layers of the BGA substrate; a known good chip scale module package (CSMP) electrically coupled to the first interconnects, wherein the CSMP includes:
(a) a second substrate including a cutout area,(b) a plurality of second interconnects electrically coupled to a first surface of the second substrate,(c) a first semiconductor die mounted over the second substrate and electrically coupled to the plurality of second interconnects,(d) a plurality of third interconnects electrically coupled to a first surface of the first semiconductor die,(e) a second semiconductor die disposed in the cutout area of the second substrate and electrically coupled to the third interconnects, wherein a surface of the second semiconductor die opposite the third interconnects contacts the BGA substrate for thermal dissipation, and(f) an underfill material deposited between the first semiconductor die and second semiconductor die; a third semiconductor die mounted over the CSMP; a plurality of fourth interconnects electrically coupled between the third semiconductor die and the second substrate; and a plurality of fifth interconnects electrically coupled between the third semiconductor die and the BGA substrate.