发明名称 DEFEAT OF ALIASING BY INCREMENTAL SAMPLING
摘要 A method includes generating a sampling signal having a non-uniform sampling interval and sampling a received signal with an analog-to-digital converter (ADC) using the sampling signal. The method also includes mapping the sampled received signal onto a frequency grid of sinusoids, where each sinusoid has a signal amplitude and a signal phase. The method further includes estimating the signal amplitude and the signal phase for each sinusoid in the frequency grid. In addition, the method includes computing an average background power level and detecting signals with power higher than the average background power level. The non-uniform sampling interval varies predictably.
申请公布号 US2016049950(A1) 申请公布日期 2016.02.18
申请号 US201414457186 申请日期 2014.08.12
申请人 Raytheon Company 发明人 Flanders Bradley;Robinson Ian S.
分类号 H03M1/12;H04B1/16;G01R23/16 主分类号 H03M1/12
代理机构 代理人
主权项 1. An apparatus comprising: a signal generator configured to generate a sampling signal with a varying sampling interval having an average time step with a variation size; and an analog-to-digital converter (ADC) configured to sample a received signal using the sampling signal; wherein the varying sampling interval is a function of the average time step, the variation size, a total number of samples taken, a and current sample number relative to the total number of samples taken.
地址 Waltham MA US