DUAL CHANNEL MEMORY

摘要

Technologies are generally described related to a dual channel memory device, system and method of manufacture. Various described devices include utilization of both a front channel and a back channel through a substrate formed underneath a dual gate structure of a semiconductor device. Using two pairs of contacts on opposing sides of the gate structure, where the contact pairs are formed on differently doped layers of the semiconductor device, multiple bits may be stored in the semiconductor device acting as a single memory cell. Memorization may be realized by storing different amount or types of charges on the floating gate, where the charges may impact a conduction status of the channels of the device. By detecting the conduction status of the channels, such as open circuit, close circuit, or high resistance, low resistance, data stored on the device (“0” or “1”) may be detected.

主权项

1. A semiconductor device comprising:
a first substrate; an insulator layer positioned over the first substrate; a second substrate positioned over the insulator layer; a gate structure comprising:
a tunnel oxide layer positioned over a first portion of the second substrate;a floating gate layer positioned over the tunnel oxide layer;a control oxide layer positioned over the floating gate layer;a control gate layer positioned over the control oxide layer, and a third substrate positioned over a second portion of the second substrate, wherein the second portion of the second substrate includes dopants of a first type and the third substrate includes dopants of a second type.