发明名称 Semiconductor Device
摘要 Provided is a semiconductor device to which a pattern structure for performance improvement is applied. The semiconductor device includes first and second active regions spaced apart from each other in a first direction with an isolation layer interposed therebetween, a first normal gate formed on the first active region to extend in a second direction crossing the first direction, a first dummy gate having a portion overlapping with one end of the isolation layer and the other portion overlapping with the first active region and spaced apart from the first normal gate in the first direction, a second dummy gate having a portion overlapping with the other end of the isolation layer and the other portion overlapping with the second active region, a first normal source/drain contact formed on a source/drain region between the first normal gate and the first dummy gate, and a dummy contact formed on the isolation layer so as not to overlap with the first and second dummy gates and having a different size from the first normal source/drain contact.
申请公布号 US2016043222(A1) 申请公布日期 2016.02.11
申请号 US201514667810 申请日期 2015.03.25
申请人 Samsung Electronics Co., Ltd. 发明人 Cho Keun-Hwi;Park Sung-II;Hong Byoung-Hak;Fukai Toshinori;Kim Mun-Hyeon;Kim Woong-Gi;Park Sue-Hye;Kim Dong-Won;Ha Dae-Won
分类号 H01L29/78;H01L29/06;H01L27/088;H01L27/092;H01L29/423 主分类号 H01L29/78
代理机构 代理人
主权项 1. A semiconductor device comprising: first and second active regions spaced apart from each other in a first direction with an isolation layer interposed therebetween; a first normal gate on the first active region, the first normal gate extending in a second direction crossing the first direction; a first dummy gate comprising a first portion overlapping a first end of the isolation layer and a second portion overlapping the first active region and being spaced apart from the first normal gate in the first direction; a second dummy gate comprising a first portion overlapping a second end of the isolation layer and a second portion overlapping the second active region; a first normal source/drain contact on a first source/drain region between the first normal gate and the first dummy gate; and a dummy contact on the isolation layer, the dummy contact not overlapping the first and second dummy gates and having a size different from a size of the first normal source/drain contact.
地址 Suwon-si KR