CONFIGURATION OF GATE TO DRAIN (GD) CLAMP AND ESD PROTECTION CIRCUIT FOR POWER DEVICE BREAKDOWN PROTECTION

摘要

A semiconductor power device supported on a semiconductor substrate comprising a plurality of transistor cells each having a source and a drain with a gate to control an electric current transmitted between the source and the drain. The semiconductor further includes a gate-to-drain (GD) clamp termination connected in series between the gate and the drain further includes a plurality of back-to-back polysilicon diodes connected in series to a silicon diode includes parallel doped columns in the semiconductor substrate wherein the parallel doped columns having a predefined gap. The doped columns further include a U-shaped bend column connect together the ends of parallel doped columns with a deep doped-well that is disposed below and engulfing the U-shaped bend.

主权项

1. A semiconductor power device supported on a semiconductor substrate comprising a plurality of transistor cells each having a source encompassed in a body region and a drain with a gate to control an electric current transmitted between the source and the drain, wherein the semiconductor further comprising:
a clamp termination structure connected in series to a silicon diode comprising a doped column disposed in said semiconductor substrate; and an end well doped with a same conductivity type as the doped column enclosing an end portion of the doped column.