| 发明名称 | Method of manufacturing a semiconductor device including a stress relief layer | ||
| 摘要 | A method of manufacturing a semiconductor device includes providing a layered structure having a hard dielectric layer containing a first dielectric material having a Young's modulus greater than 10 GPa in a central portion of a main surface of a main body comprising a single crystalline semiconductor body, and providing a dielectric stress relief layer containing a second dielectric material having a lower Young's modulus than the first dielectric material, the stress relief layer covering the layered structure and extending beyond an outer edge of the layered structure. | ||
| 申请公布号 | US9218960(B2) | 申请公布日期 | 2015.12.22 |
| 申请号 | US201414319534 | 申请日期 | 2014.06.30 |
| 申请人 | Infineon Technologies AG | 发明人 | Nelle Peter;Schmalzbauer Uwe;Holzmueller Juergen;Zundel Markus |
| 分类号 | H01L21/311;H01L21/02;H01L29/06;H01L21/78;H01L23/29;H01L23/31;H01L23/00 | 主分类号 | H01L21/311 |
| 代理机构 | Murphy, Bilak & Homiller, PLLC | 代理人 | Murphy, Bilak & Homiller, PLLC |
| 主权项 | 1. A method of manufacturing a semiconductor device, the method comprising: providing a layered structure comprising a hard dielectric layer containing a first dielectric material having a Young's modulus greater than 10 GPa on a central portion of a main surface of a main body comprising a single crystalline semiconductor body, the layered structure being absent in an edge portion of the main surface between the central portion and an outer edge of the main body, the outer edge connecting the main surface and a backside surface opposite to the main surface; and providing a dielectric stress relief layer containing a second dielectric material having a lower Young's modulus than the first dielectric material, the stress relief layer covering the layered structure and extending beyond an outer edge of the layered structure. | ||
| 地址 | Neubiberg DE | ||