发明名称 Memory cell supply voltage control based on error detection
摘要 For one embodiment, an apparatus comprises memory circuitry including memory cells, error detection circuitry to detect error in data stored by memory cells of the memory circuitry, and supply voltage control circuitry to increase supply voltage for one or more memory cells of the memory circuitry based at least in part on detected error. Other embodiments have one or more other features.
申请公布号 GB2442846(B) 申请公布日期 2009.01.28
申请号 GB20070019014 申请日期 2007.09.28
申请人 INTEL CORPORATION 发明人 MUHAMMAD KHELLAH;DINESH SOMASEKHAR;YIBIN YE
分类号 G06F11/10;G06F1/26;G11C29/00 主分类号 G06F11/10
代理机构 代理人
主权项
地址