发明名称
摘要 <p>Methods to selectively form a dielectric etch stop layer over a patterned metal feature. Embodiments include a transistor incorporating such an etch stop layer over a gate electrode. In accordance with certain embodiments of the present invention, a metal is selectively formed on the surface of the gate electrode which is then converted to a silicide or germanicide. In other embodiments, the metal selectively formed on the gate electrode surface enables a catalytic growth of a silicon or germanium mesa over the gate electrode. At least a portion of the silicide, germanicide, silicon mesa or germanium mesa is then oxidized, nitridized, or carbonized to form a dielectric etch stop layer over the gate electrode only.</p>
申请公布号 JP2011524080(A) 申请公布日期 2011.08.25
申请号 JP20110508726 申请日期 2009.06.25
申请人 发明人
分类号 H01L21/768;H01L21/28;H01L21/314;H01L21/316;H01L21/318;H01L29/423;H01L29/49;H01L29/78;H01L29/786 主分类号 H01L21/768
代理机构 代理人
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