Priority based layout versus schematic (LVS)

摘要

An approach for methodology, and an associated system, enabling a prioritizing of devices, circuits, and modules of interest is disclosed. Embodiments include: determining a first electrical layout indicating an electrical performance of a physical layout of an IC design, the first electrical layout indicating a plurality of devices of the physical layout; selecting a subset of the plurality of the devices based on one or more connections of the devices; and generating a second electrical layout indicating the electrical performance of the physical layout, the second electrical layout indicating the selected devices without at least one of the plurality of devices.

主权项

1. A method comprising:
determining a first electrical layout indicating an electrical performance of a physical layout of an integrated circuit (IC) design, the first electrical layout indicating a plurality of devices of the physical layout; selecting a subset of the plurality of the devices based on one or more connections of the devices; determining whether one of the plurality of devices impacts an electrical characteristic of the selected devices based on a determination of whether the one device is an active or passive device; and generating, via at least one computer, a second electrical layout indicating the electrical performance of the physical layout, the second electrical layout indicating the selected devices without at least one of the plurality of devices, wherein the second electrical layout is generated to include the one device based on the determination of whether the one device impacts the electrical characteristic of the selected devices.