发明名称 COMPARING A RUNLENGTH OF BITS WITH A VARIABLE NUMBER
摘要 Processing circuitry 2 is provided for comparing a number of adjacent widths having a common value and extending from a starting position within an input number with a runlength specified by a variable number. The circuitry includes a mask generator 22 for generating a mask value in dependence upon the variable number, combination circuitry 24 for performing a logical combination operation upon respective bits within the input number starting from the starting position and corresponding bits within the mask value so as to generate an intermediate value. Result circuitry 26 then generates a result indicative of whether or not the number of adjacent bits is less than or equal to the run length in dependence upon a determination if any bits within the intermediate value have a predetermined value.
申请公布号 US2015227346(A1) 申请公布日期 2015.08.13
申请号 US201514606217 申请日期 2015.01.27
申请人 ARM LIMITED 发明人 BURGESS Neil;LUTZ David Raymond
分类号 G06F7/74 主分类号 G06F7/74
代理机构 代理人
主权项 1. Apparatus for comparing a number of adjacent bits having a common value and extending from a starting bit position within an input number with a runlength specified by a (N+1)-bit variable number, where N is a positive integer, said apparatus comprising: a mask generator configured to generate a 2(N+1)-bit mask value in dependence upon said (N+1)-bit variable number; combination circuitry configured to perform a logical combination operation upon respective bits within said input number starting from said starting bit position and corresponding bits within said 2(N+1)-bit mask value to generate a 2(N+1)-bit intermediate value; and result circuitry configured to generate a result indicative of whether or not said number of adjacent bits is less than or equal to said runlength in dependence upon a determination if any bits within said 2(N+1)-bit intermediate value have a predetermined value.
地址 Cambridge GB