发明名称 LOGIC ANALYZER
摘要 A logic analyzer (6) is provided with a state controller (12) and analyzer circuit. The logic analyzer switches between a programmable sequence of trigger states and generates an index signal within each trigger state. The index signal is used to control the analyzer circuit to select appropriate portions of programmable trigger state data so as to configure the matching operation performed against hardware signal values taken from hardware circuit (4) which is subject to analysis by the logic analyzer (6).
申请公布号 KR20150140216(A) 申请公布日期 2015.12.15
申请号 KR20150070216 申请日期 2015.05.20
申请人 에이알엠 리미티드 发明人 라빈 마크 제랄드
分类号 G01R31/3177;G06F11/25 主分类号 G01R31/3177
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