发明名称 パルス合成回路
摘要 <p>A circuit having versatility synthesizes one-bit digital signals to generate a ternary signal. The pulse synthesizing circuit synthesizes one-bit digital signals from two DFFs to generate a ternary signal. The pulse synthesizing circuit has a first NOR gate, a second NOR gate, a third NOR gate, and three switches. The first switch is connected to a first electric potential, the second switch is connected to a second electric potential, and the third switch is connected to a third electric potential. The first to third switches are turned on/off according to logical values of the signals from the two DFFs, and any of the first electric potential, the second electric potential, and the third electric potential is set as an output potential so that a ternary signal is generated.</p>
申请公布号 JP5821901(B2) 申请公布日期 2015.11.24
申请号 JP20130123048 申请日期 2013.06.11
申请人 オンキヨー株式会社 发明人 中西 芳徳;川口 剛;関谷 守
分类号 H03M5/16;H03K19/20 主分类号 H03M5/16
代理机构 代理人
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