| 主权项 |
1. A computing system, comprising:
a first central processing unit (CPU); a second CPU in communication with the first CPU and with a host processor; a memory; an instruction checker circuitry, where, in response to a request by the host processor to boot the second CPU,
the second CPU is configured to execute a two-stage secure booting, where the second CPU is configured to:
execute first stage code to request, from the first CPU, decryption information to decrypt a second stage code of the two-stage secure booting;decrypt the second stage code stored in a first region of the memory;write the decrypted second stage code to a second region of the memory; and execute the second stage code of the two-stage secure booting, and where, the instruction checker circuitry is configured to monitor execution of the second stage code by the second CPU, and in response to detection of an attempt to execute an instruction located outside of the second region of the memory, prevent execution of the instruction by the second CPU. |
