发明名称 Semiconductor device in which internal stress in a layer is relaxed to suppress warping
摘要 According to one embodiment, a semiconductor device includes a semiconductor layer, an electrode, and an insulating portion. The semiconductor layer has a first surface. The electrode is provided on the first surface of the semiconductor layer. The insulating portion includes a first layer and a second layer. The first layer covers the electrode on the first surface of the semiconductor layer and has a first internal stress along the first surface. The second layer is provided on the first layer and has a second internal stress in a reverse direction of the first internal stress.
申请公布号 US9171807(B2) 申请公布日期 2015.10.27
申请号 US201314026003 申请日期 2013.09.13
申请人 Kabushiki Kaisha Toshiba 发明人 Takada Yoshiharu
分类号 H01L23/48;H01L23/00;H01L23/31 主分类号 H01L23/48
代理机构 Oblon, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A semiconductor device comprising: a semiconductor layer having a first surface, the first surface including a first region and a second region; an electrode provided on the first region; and an insulating portion including a first layer including a first part and a second part, the first part being provided on the electrode and the second part being provided on the second region, the first layer having a first internal stress along the first surface, and a second layer provided on the first part and the second part, the second layer having a second internal stress in a reverse direction of the first internal stress, a first thickness of the first part being thinner than a second thickness of the second part, the second thickness being thicker than a third thickness of the electrode, and a fourth thickness of the second layer being thinner than the first thickness and thinner than the second thickness.
地址 Minato-ku JP
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