发明名称 PLL circuit and semiconductor device
摘要 A PLL circuit has a phase comparator to receive an input signal and a feedback signal, a charge pump controlled by an output of the phase comparator, a lowpass filter part to receive an output of the charge pump, a current controlled oscillator controlled by an output of the lowpass filter part, and a frequency divider to frequency-divide an output of the current controlled oscillator and to output the feedback signal. The lowpass filter part has an amplifier to receive the output of the charge pump and a reference voltage, and a circuit part including capacitors and resistors to receive the output of the charge pump and an output of the amplifier.
申请公布号 US2007200637(A1) 申请公布日期 2007.08.30
申请号 US20060505446 申请日期 2006.08.17
申请人 FUJITSU LIMITED 发明人 KODATO KENICHI;MATSUDA ATSUSHI
分类号 H03L7/00 主分类号 H03L7/00
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