<p>An integrated circuit provides a power on reset signal with respect to a supply voltage level supplying the electronic device. The integrated circuit comprises a bias current generating stage having a first current mirror and an output stage having first, second and third series connected MOS transistors. A connection between the second MOS transistor and the third MOS transistor forms a POR output node. A gate of the second MOS transistor and a gate of the third MOS transistor are coupled to each other and to the first current mirror. This allows a current through the third MOS transistor when the supply voltage is higher than a first MOS transistor threshold and a current through the second MOS transistor only when the supply voltage is greater than or equal to the sum of the first MOS transistor threshold and a second MOS transistor threshold voltage.</p>
申请公布号
WO2009047339(A1)
申请公布日期
2009.04.16
申请号
WO2008EP63651
申请日期
2008.10.10
申请人
TEXAS INSTRUMENTS DEUTSCHLAND GMBH;GARCIA, SANTIAGO IRIARTE;GERBER, JOHANNES;RUCK, BERNHARD WOLFGANG
发明人
GARCIA, SANTIAGO IRIARTE;GERBER, JOHANNES;RUCK, BERNHARD WOLFGANG