| 摘要 |
<p>This semiconductor device comprises: a first planar silicon layer (309); first and second columnar silicon layers (504, 505) formed on the first planar silicon layer (309); a first gate insulating film (506) formed around the first columnar silicon layer; a first gate electrode (303) formed around the first gate insulating film (506); a second gate insulating film (506) formed around the second columnar silicon layer; a second gate electrode (304) formed around the second gate; a first gate wiring (305) connected to the first and second gate electrodes; a first n-type diffusion layer (524) formed at the top of the first columnar silicon layer (504); a second n-type diffusion layer (502) formed at the bottom of the first columnar silicon layer (504) and the top of the planar silicon layer (309); a first p-type diffusion layer (525) formed at the top of the second n-type diffusion layer (502); and a second p-type diffusion layer (503) formed at the bottom of the second columnar silicon layer and the top of the planar silicon layer. A center line that extends along the first gate wiring is offset by a first prescribed amount from a line joining the center of the first columnar silicon layer and the center of the second columnar silicon layer.</p> |
