发明名称 VOLTAGE REGULATOR AND SEMICONDUCTOR DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To provide a voltage regulator including a clamp circuit capable of protecting a gate of an output transistor without restricting the drivability of the output transistor.SOLUTION: A voltage regulator includes a level shift circuit that has an input terminal connected to a gate of an output transistor and has an output terminal connected to an input of a clamp circuit. The clamp circuit is controlled by an output voltage of the level shift circuit.</p>
申请公布号 JP2015135627(A) 申请公布日期 2015.07.27
申请号 JP20140007147 申请日期 2014.01.17
申请人 SEIKO INSTRUMENTS INC 发明人 TOMIOKA TSUTOMU
分类号 G05F1/56 主分类号 G05F1/56
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