Extended single-bit error correction and multiple-bit error detection

摘要

Some embodiments include apparatus and methods to prevent at least one of misidentifying and ignoring multiple-bit errors if the multiple-bit errors include a plurality of erroneous data bits that belong to only one specific group of a plurality of groups of data bits and if none of the other groups of the plurality of groups have errors.

主权项

1. An apparatus comprising:
lines configured to transfer information that includes groups, each of the groups including bits, each of the lines configured to serially transfer the bits of one of the groups in a plurality of transfers; and a module configured to implement a matrix that includes a first portion to enable detection of errors in a number of transfers among the plurality of transfers and a second portion to enable identifying whether the detected errors have occurred to bits of one of the groups.