发明名称 Legalizing a portion of a circuit layout
摘要 A layout-legalizing system modifies a portion of a circuit layout that is selected by a user to generate a modified portion that satisfies a set of technology constraints and a set of design constraints. The system receives as input the set of technology constraints which a semiconductor manufacturing foundry requires the circuit layout to satisfy for manufacturability purposes. The system also receives a set of design constraints from the user which restricts how objects in the portion of the circuit layout can be modified to satisfy the set of technology constraints. The system can further receive a selection input from the user which identifies the portion of the circuit layout which is to be legalized. The system then modifies the identified portion of the circuit layout to obtain a modified portion which satisfies the set of design constraints and at least a subset of the set of technology constraints.
申请公布号 US9043741(B2) 申请公布日期 2015.05.26
申请号 US200912609996 申请日期 2009.10.30
申请人 SYNOPSYS, INC. 发明人 Batterywala Shabbir H.;Bhattacharya Sambuddha;Rajagopalan Subramanian;Ma Hi-Keung Tony
分类号 G06F17/50 主分类号 G06F17/50
代理机构 Park, Vaughan, Fleming & Dowler LLP 代理人 Park, Vaughan, Fleming & Dowler LLP ;Sahasrabuddhe Laxman
主权项 1. A computer-implemented method for legalizing a portion of a circuit layout, the method comprising: receiving a set of technology constraints which a semiconductor manufacturing foundry requires the circuit layout to satisfy for manufacturability purposes, wherein the set of technology constraints include design rules; receiving a set of design constraints, wherein the set of design constraints specify object placements and/or configurations that must be preserved during legalization, wherein a design constraint in the set of design constraints requires that symmetry between a first polygon and a second polygon with respect to an axis of symmetry be preserved during legalization, wherein the axis of symmetry is located between the first polygon and the second polygon; and modifying, by computer, a portion of the circuit layout to obtain a modified portion of the circuit layout, wherein said modifying involves modifying the size and/or shape of a first polygon to satisfy at least one technology constraint, and modifying the size and/or shape of a second polygon to preserve symmetry between the first polygon and the second polygon with respect to the axis of symmetry.
地址 Mountain View CA US