Output buffers

摘要

An output buffer is provided. The output buffer is coupled to a first voltage source providing a first supply voltage and used for generating an output signal at an output terminal according to an input signal. The output buffer includes first and second transistors and a self-bias circuit. The first and second transistors are cascaded between the output terminal and a reference voltage. The self-bias circuit is coupled to the output terminal and the control electrode of the first transistor. When the output buffer does not receive the first supply voltage, the self-bias circuit provides a first bias voltage to the control electrode of the first transistor according to the output signal to decrease voltage differences between the control electrode and the input and output electrodes of the first transistor to be lower than a predetermined voltage.

主权项

1. An output buffer, coupled to a first voltage source providing a first supply voltage, for generating an output signal at an output terminal according to an input signal, comprising:
a first transistor having a control electrode, an input electrode coupled to the output terminal, and an output electrode; a second transistor having a control electrode, an input electrode coupled to the output electrode of the first transistor, and an output electrode coupled to a reference voltage; and a self-bias circuit coupled to the output terminal and the control electrode of the first transistor, wherein when the output buffer does not receive the first supply voltage, the self-bias circuit provides a first bias voltage at the control electrode of the first transistor according to the output signal to decrease voltage differences between the control electrode and the input and output electrodes of the first transistor to be lower than a predetermined voltage, and wherein the output buffer further comprises a bias providing circuit, comprising: a first bias-providing transistor having control and input electrodes directly connected to the first voltage source and an output electrode directly connected to the control electrode of the first transistor; a second bias-providing transistor having control and input electrodes directly connected to the control electrode of the first transistor and an output electrode; and a third bias-providing transistor having an input electrode directly connected to the output electrode of the second bias-providing transistor, a control electrode directly connected to a second voltage source providing a second supply voltage, and an output electrode directly connected to the reference voltage, wherein when the output buffer receives the first supply voltage, the bias providing circuit provides a second bias voltage at the control electrode of the first transistor according to the first supply voltage to decrease the voltage differences between the control electrode and the input and output electrodes of the first transistor to be lower than the predetermined voltage.