发明名称 |
MEMORY COMPONENT HAVING INTERNAL READ-MODIFY-WRITE OPERATION |
摘要 |
An memory component includes a memory bank and a command interface to receive a read-modify-write command, having an associated read address indicating a location in the memory bank and to either access read data from the location in the memory bank indicated by the read address after an adjustable delay period transpires from a time at which the read-modify-write command was received or to overlap multiple read-modify-write commands. The memory component further includes a data interface to receive write data associated with the read-modify-write command and an error correction circuit to merge the received write data with the read data to form a merged data and write the merged data to the location in the memory bank indicated by the read address. |
申请公布号 |
WO2015048037(A1) |
申请公布日期 |
2015.04.02 |
申请号 |
WO2014US57040 |
申请日期 |
2014.09.23 |
申请人 |
RAMBUS INC. |
发明人 |
WARE, FREDERICK;VOGELSANG, THOMAS |
分类号 |
G11C7/22 |
主分类号 |
G11C7/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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