On-chip electrostatic discharge protection for a semiconductor device

摘要

Embodiments of the invention provide increased ESD protection suitable for high-voltage devices. In one embodiment, an internal DMOS circuit is placed in parallel with a lateral NPN ESD clamp. The clamp has both a high holding voltage, above the operating voltage of the DMOS circuit, and a high maximum current before breakdown. The discharge path of the clamp includes a high-voltage lightly doped well containing a low-voltage higher doped well. The dopant of both wells is the same type, and the interface between the two defines a graded junction. The emitter of the entire circuit is grounded and the collector is coupled to the voltage of the DMOS circuit.

主权项

1. A semiconductor device comprising:
a circuit element; a first electrostatic device in parallel with and electrically connected to the circuit element, wherein the first electrostatic device comprises first and second high-voltage wells having opposite polarities, the first electrostatic device includes a first graded junction; a second electrostatic device in parallel with and electrically connected to the circuit element and in parallel with the first electrostatic device, where the second electrostatic device comprises a third high-voltage well of the same polarity and adjacent to the first high-voltage well and a fourth high-voltage well of the same polarity as the second high-voltage well, the second electrostatic device includes a second graded junction; and a third electrostatic device in parallel with and electrically connected to the circuit element and in parallel with the first electrostatic device and the second electrostatic device, where the third electrostatic device comprises a fifth high-voltage well and a sixth high-voltage well of the same polarity as the first high-voltage well, the third electrostatic device includes a third graded junction, wherein the first electrostatic device, the second electrostatic device, the third electrostatic device, and the circuit element are disposed within a common substrate.