发明名称 Output circuit, data driver, and display device
摘要 An output circuit includes a differential amplifier circuit, an output amplifier circuit, a control circuit, input and output terminals, and first to third supply terminals applied with first to third supply voltages, respectively. The third supply voltage is set a voltage between the first and second supply voltages. The differential amplifier circuit differentially receives signals of the input and output terminals. The output amplifier circuit includes first and second transistors of different conduction type each other coupled in series between the first and third supply terminals via the output terminal, and having control terminals coupled to first and second output nodes of the differential amplifier circuit, respectively. The control circuit includes a third transistor and a switch, and controls the third transistor being in a diode coupling mode between the first supply terminal and the control terminal of the first transistor for a given period of the output period.
申请公布号 US8988402(B2) 申请公布日期 2015.03.24
申请号 US201113317858 申请日期 2011.10.31
申请人 Renesas Electronics Corporation 发明人 Tsuchi Hiroshi
分类号 G09G5/00;H03F3/45;H03F1/02;G09G3/36 主分类号 G09G5/00
代理机构 McGinn IP Law Group, PLLC 代理人 McGinn IP Law Group, PLLC
主权项 1. An output circuit comprising: a differential amplifier circuit; an output amplifier circuit; a first control circuit; an input terminal; an output terminal; and first to third supply terminals to which first to third supply voltages are applied, wherein the third supply voltage is set to a voltage between the first supply voltage and the second supply voltage, or the second supply voltage, wherein the differential amplifier circuit includes a differential input stage including a differential input pair with a first input and a second input to which an input signal of the input terminal and an output signal of the output terminal are input, respectively, and first and second current mirrors including transistor pairs of first and second conduction types, respectively, which are coupled to the first and second supply terminals, respectively, wherein at least one of the first and second current mirrors receives an output current of the differential input stage, and includes a first connection circuit that connects between an input of the first current mirror and an input of the second current mirror, and a second connection circuit that connects between an output of the first current mirror and an output of the second current mirror, wherein the output amplifier circuit includes a first transistor of the first conduction type coupled between the first supply terminal and the output terminal, and including a control terminal coupled to a coupling point between an output node of the first current mirror and one end of the second connection circuit, and a second transistor of the second conduction type coupled between the output terminal and the third supply terminal, and including a control terminal coupled to the other end of the second connection circuit, wherein the first control circuit includes a third transistor and a first switch which are coupled in series between the first supply terminal and the control terminal of the first transistor, wherein the first switch is kept on for a given period since start of an output period in which the output signal corresponding to the input signal is output from the output terminal, kept off for the remaining period of the output period, wherein in the given period in which the first switch is kept on, the control terminal of the first transistor is electrically conductive to the first supply terminal through the third transistor including a control terminal and a first terminal coupled thereto in a diode coupling mode, and a gate voltage of the first transistor is set to a value that the output amplifier circuit is in an output stable state, and wherein in the remaining period of the output period in which the first switch is kept off, a current path of the third transistor between the first supply terminal and the control terminal of the first transistor is cut off.
地址 Kawasaki-shi, Kanagawa JP