| 发明名称 |
Semiconductor structure and method for fabricating semiconductor layout |
| 摘要 |
A method for fabricating a semiconductor layout includes providing a first layout having a plurality of line patterns and a second layout having a plurality of connection patterns, defining at least a first to-be-split pattern overlapping with the connection pattern among the line patterns, splitting the first to-be-split pattern at where the first to-be-split pattern overlapping with the connection pattern, decomposing the first layout to form a third layout and a fourth layout, and outputting the third layout and the further layout to a first mask and a second mask respectively. |
| 申请公布号 |
US8966410(B2) |
申请公布日期 |
2015.02.24 |
| 申请号 |
US201314065443 |
申请日期 |
2013.10.29 |
| 申请人 |
United Microelectronics Corp. |
发明人 |
Huang Chia-Wei;Chen Ming-Jui;Huang Chun-Hsien |
| 分类号 |
G06F17/50;G06F19/00;G03F1/00;G21K5/00;G03F1/76;H01L21/311;G03F1/70;H01L23/522;H01L23/528;H01L21/768 |
主分类号 |
G06F17/50 |
| 代理机构 |
|
代理人 |
Hsu Winston;Margo Scott |
| 主权项 |
1. A method for fabricating a semiconductor layout comprising:
providing a first layout comprising a plurality of line patterns; providing a second layout comprising a plurality of connection patterns; defining at least a first to-be-split pattern among the line patterns of the first layout, the first to-be-split pattern being overlapped with the connection pattern; and splitting the first to-be-split pattern at where the first to-be-split pattern overlapped with the connection pattern to decompose the first layout into a third layout and a fourth layout; and outputting the third layout and the fourth layout to a first finished mask and a second finished mask respectively; and fabricating the semiconductor layout using the outputted masks. |
| 地址 |
Science-Based Industrial Park, Hsin-Chu TW |
