| 发明名称 |
Germanium Barrier Embedded in MOS Devices |
| 摘要 |
An integrated circuit structure includes a gate stack over a semiconductor substrate, and an opening extending into the semiconductor substrate, wherein the opening is adjacent to the gate stack. A first silicon germanium region is in the opening, wherein the first silicon germanium region has a first germanium percentage. A second silicon germanium region is over the first silicon germanium region, wherein the second silicon germanium region has a second germanium percentage higher than the first germanium percentage. A third silicon germanium region is over the second silicon germanium region, wherein the third silicon germanium region has a third germanium percentage lower than the second germanium percentage. |
| 申请公布号 |
US2015048417(A1) |
申请公布日期 |
2015.02.19 |
| 申请号 |
US201313968751 |
申请日期 |
2013.08.16 |
| 申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Kwok Tsz-Mei;Li Kun-Mu;Sung Hsueh-Chang;Li Chii-Horng;Lee Tze-Liang |
| 分类号 |
H01L29/78;H01L29/66 |
主分类号 |
H01L29/78 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An integrated circuit structure comprising:
a semiconductor substrate; a gate stack over the semiconductor substrate; an opening extending into the semiconductor substrate, wherein the opening is adjacent to the gate stack; a first silicon germanium region in the opening, wherein the first silicon germanium region has a first germanium percentage; a second silicon germanium region over the first silicon germanium region, wherein the second silicon germanium region has a second germanium percentage higher than the first germanium percentage; and a third silicon germanium region over the second silicon germanium region, wherein the third silicon germanium region has a third germanium percentage lower than the second germanium percentage. |
| 地址 |
Hsin-Chu TW |
