| 摘要 |
<p>The present invention has a configuration in which a reduction and interpolation circuit having a variable reduction ratio and at least one reduction circuit having a fixed reduction ratio are sequentially connected. In the case where a set reduction rate cannot be achieved in the reduction and interpolation circuit, a reduction ratio for the reduction and interpolation circuit is determined such that the set reduction ratio can be achieved through a combination of the reduction ratio of the reduction and interpolation circuit and the reduction ratio of the reduction circuit. It is thereby possible to obtain an image processing apparatus capable of generating a reduced image reduced at a high reduction ratio and having high image quality while suppressing the circuit size.</p> |
