发明名称 |
HARD MASK FOR SOURCE/DRAIN EPITAXY CONTROL |
摘要 |
An integrated circuit is formed to include a first polarity MOS transistor and a second, opposite, polarity MOS transistor. A hard mask of silicon-doped boron nitride (SixBN) with 1 atomic percent to 30 atomic percent silicon is formed over the first polarity MOS transistor and the second polarity MOS transistor. The hard mask is removed from source/drain regions of the first polarity MOS transistor and left in place over the second polarity MOS transistor. Semiconductor material is epitaxially grown at the source/drain regions of the first polarity MOS transistor while the hard mask is in place. Subsequently, the hard mask is removed from the second polarity MOS transistor. |
申请公布号 |
US2015044830(A1) |
申请公布日期 |
2015.02.12 |
申请号 |
US201313960517 |
申请日期 |
2013.08.06 |
申请人 |
Texas Instruments Incorporated |
发明人 |
Farber David Gerald;Lii Tom;Kirkpatrick Brian K. |
分类号 |
H01L21/8238 |
主分类号 |
H01L21/8238 |
代理机构 |
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代理人 |
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主权项 |
1. A method of forming an integrated circuit, comprising the steps of:
providing a substrate comprising a semiconductor; forming a first metal oxide semiconductor (MOS) transistor having a first polarity on said substrate; forming a second MOS transistor having a second, opposite, polarity on said substrate; forming a layer of silicon-doped boron nitride over said first MOS transistor and said second MOS transistor, said layer of silicon-doped boron nitride having 1 atomic percent to 30 atomic percent of silicon; removing said layer of silicon-doped boron nitride from over said first MOS transistor; and forming epitaxial source and drain regions on said substrate adjacent to source/drain (S/D) spacers of said first MOS transistor, said S/D spacers being disposed on lateral surfaces of a gate of said first MOS transistor. |
地址 |
Dallas TX US |