发明名称 Dynamic bit line bias for programming non-volatile memory
摘要 A program operation for a set of non-volatile storage elements. A count is maintained of a number of program pulses which are applied to an individual storage element in a slow programming mode, and an associated bit line voltage is adjusted based on the count. Different bit line voltages can be used, having a common step size or different steps sizes. As a result, the change in threshold voltage of the storage element within the slow programming mode, with each program pulse can be made uniform, resulting in improved programming accuracy. Latches maintain the count of program pulses experienced by the associated storage element, while in the slow programming mode. The storage element is in a fast programming mode when its threshold voltage is below a lower verify level, and in the slow programming mode when its threshold voltage is between the lower verify level and a higher verify level.
申请公布号 US8953386(B2) 申请公布日期 2015.02.10
申请号 US201213660203 申请日期 2012.10.25
申请人 SanDisk Technologies Inc. 发明人 Dutta Deepanshu;Oowada Ken;Higashitani Masaaki;Mui Man L.
分类号 G11C16/04 主分类号 G11C16/04
代理机构 Vierra Magen Marcus LP 代理人 Vierra Magen Marcus LP
主权项 1. A method for programming in a non-volatile storage device, comprising: in a program operation, applying one or more initial program pulses to one non-volatile storage element; during each program pulse of the one or more initial program pulses, setting a voltage of a bit line associated with the one non-volatile storage element at an initial level which allows programming of the one non-volatile storage element; determining when a threshold voltage of the one non-volatile storage element exceeds a lower verify level of a target data state of the one non-volatile storage element; and when the threshold voltage of the one non-volatile storage element exceeds the lower verify level, applying additional program pulses to the one non-volatile storage element, maintaining a count of a number of the additional program pulses which are applied to the one non-volatile storage element, and during the additional program pulses, setting the voltage of the bit line at one or more stepped up levels as a function of the count, the one or more stepped up levels are stepped up from the initial level and allow programming of the one non-volatile storage element.
地址 Plano TX US