发明名称 |
MIDDLE-OF-LINE BORDERLESS CONTACT STRUCTURE AND METHOD OF FORMING |
摘要 |
Various embodiments disclosed include semiconductor structures and methods of forming such structures. In one embodiment, a method includes: providing a semiconductor structure including: a substrate; at least one gate structure overlying the substrate; and an interlayer dielectric overlying the substrate and the at least one gate structure; removing the ILD overlying the substrate to expose the substrate; forming a silicide layer over the substrate; forming a conductor over the silicide layer and the at least one gate structure; forming an opening in the conductor to expose a portion of a gate region of the at least one gate structure; and forming a dielectric in the opening in the conductor. |
申请公布号 |
US2015035026(A1) |
申请公布日期 |
2015.02.05 |
申请号 |
US201414519622 |
申请日期 |
2014.10.21 |
申请人 |
International Business Machines Corporation |
发明人 |
Anderson Brent A.;Horak David V.;Nowak Edward J. |
分类号 |
H01L29/417;H01L21/3213;H01L29/45;H01L21/3205;H01L29/78;H01L29/66 |
主分类号 |
H01L29/417 |
代理机构 |
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代理人 |
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主权项 |
1. A method comprising:
providing a semiconductor structure including:
a substrate;at least one gate structure overlying the substrate, the at least one gate structure having:
a gate region contacting the substrate;a set of spacers adjacent to the gate region and contacting the substrate;a replacement metal gate (RMG) cap overlying the gate region between the set of spacers; andan interlayer dielectric (ILD) overlying the substrate and substantially surrounding the at least one gate structure; removing the ILD overlying the substrate to expose the substrate; forming a silicide layer over the substrate; forming a conductor over the silicide layer and the at least one gate structure; forming an opening in the conductor to expose a portion of the gate region; and forming a dielectric in the opening in the conductor. |
地址 |
Armonk NY US |