发明名称 METHOD OF FABRICATING DUAL HIGH-K METAL GATES FOR MOS DEVICES
摘要 The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a capping layer over the high-k dielectric layer in the first region, forming a first metal layer over capping layer in the first region and over the high-k dielectric in the second region, thereafter, forming a first gate stack in the first region and a second gate stack in the second region, protecting the first metal layer in the first gate stack while performing a treatment process on the first metal layer in the second gate stack, and forming a second metal layer over the first metal layer in the first gate stack and over the treated first metal layer in the second gate stack.
申请公布号 US2015021705(A1) 申请公布日期 2015.01.22
申请号 US201414507362 申请日期 2014.10.06
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Hsu Peng-Fu;Lin Kang-Cheng;Huang Kuo-Tai
分类号 H01L27/092;H01L29/51;H01L29/49 主分类号 H01L27/092
代理机构 代理人
主权项 1. A device comprising: a first gate structure having a first conductivity type disposed over a semiconductor substrate, wherein the first gate structure includes: a high-k dielectric layer formed over the semiconductor substrate;a capping layer formed over the high-k dielectric layer;a first metal layer formed over the capping layer, wherein the first metal layer has the first conductivity type; anda fill metal layer disposed over the first metal layer; and a second gate structure having a second conductivity type disposed over the semiconductor substrate, wherein the second conductivity type is opposite the first conductivity type, wherein the second gate structure includes: the high-k dielectric layer formed over the semiconductor substrate;the first metal layer formed over the high-k dielectric layer, wherein the first metal layer of the second gate structure includes a first surface facing away from the semiconductor substrate and a second surface facing away from the semiconductor substrate, wherein the first surface is non-planar with respect to the second surface;a second metal layer formed over the first metal layer such that the second metal layer physically contacts the first surface and the second surface of the first metal layer of the second gate structure, wherein the second metal layer has the second conductivity type; andthe fill metal layer disposed over the second metal layer.
地址 Hsin-Chu TW